Reset and clock control for STM32F42xxx and STM32F43xxx (RCC)
RM0090
152/1731
DocID018909 Rev 11
Each clock source can be switched on or off independently when it is not used, to optimize
power consumption.
Figure 16. Clock tree
1. For full details about the internal and external clock source characteristics, refer to the Electrical characteristics section in
the device datasheet.
2. When TIMPRE bit of the RCC_DCKCFGR register is reset, if APBx prescaler is 1, then TIMxCLK = PCLKx, otherwise
TIMxCLK = 2x PCLKx.
3. When TIMPRE bit in the RCC_DCKCFGR register is set, if APBx prescaler is 1,2 or 4, then TIMxCLK = HCLK, otherwise
TIMxCLK = 4x PCLKx.
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