Serial audio interface (SAI)
RM0090
952/1731
DocID018909 Rev 11
Bit 2
WCKCFGIE
: Wrong clock configuration interrupt enable. This bit is set and cleared by software.
0: Interrupt is disabled
1: Interrupt is enabled
This bit is considered only if the audio block is configured as master (MODE[1] = 0 in the SAI_ACR1
register) and bit NODIV = 0 in the SAI_xCR1 register.
It generates an interrupt if the flag WCKCFG in the SAI_ASR register is set.
Note: This bit is used only in TDM mode and has no meaning for other modes.
Bit 1
MUTEDETIE
: Mute detection interrupt enable
.
This bit is set and cleared by software.
0: Interrupt is disabled
1: Interrupt is enabled
When this bit is set, an interrupt will be generated if the MUTEDET bit in the SAI_ASR register is set.
This bit has a meaning only if the audio block is configured in receiver mode.
Bit 0
OVRUDRIE
: Overrun/underrun interrupt enable
.
This bit is set and cleared by software.
0: Interrupt is disabled
1: Interrupt is enabled
When this bit is set, an interrupt will be generated if the OVRUDR bit in the SAI_ASR register is set.