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Architecture
470
SPRUH82C – April 2013 – Revised September 2016
Copyright © 2013–2016, Texas Instruments Incorporated
Enhanced High-Resolution Pulse-Width Modulator (eHRPWM)
Example 16-1. Constant Definitions Used in the Code Examples (continued)
// CHPFREQ bit
#define
CHP_DIV1
0x0
#define
CHP_DIV2
0x1
#define
CHP_DIV3
0x2
#define
CHP_DIV4
0x3
#define
CHP_DIV5
0x4
#define
CHP_DIV6
0x5
#define
CHP_DIV7
0x6
#define
CHP_DIV8
0x7
// CHPDUTY bit
#define
CHP1_8TH
0x0
#define
CHP2_8TH
0x1
#define
CHP3_8TH
0x2
#define
CHP4_8TH
0x3
#define
CHP5_8TH
0x4
#define
CHP6_8TH
0x5
#define
CHP7_8TH
0x6
// TZSEL (Trip-zone Select)
// = = = = = = = = = = = = = = = = = = = = = = = = = =
// CBCn and OSHTn bits
#define
TZ_DISABLE
0x0
#define
TZ_ENABLE
0x1
// TZCTL (Trip-zone Control)
// = = = = = = = = = = = = = = = = = = = = = = = = = =
// TZA and TZB bits
#define
TZ_HIZ
0x0
#define
TZ_FORCE_HI
0x1
#define
TZ_FORCE_LO
0x2
#define
TZ_NONE
0x3
// ETSEL (Event-trigger Select)
// = = = = = = = = = = = = = = = = = = = = = = = = = =
// INTSEL bit
#define
ET_CTR_ZERO
0x1
#define
ET_CTR_PRD
0x2
#define
ET_CTRU_CMPA
0x4
#define
ET_CTRD_CMPA
0x5
#define
ET_CTRU_CMPB
0x6
#define
ET_CTRD_CMPB
0x7
// ETPS (Event-trigger Prescale)
// = = = = = = = = = = = = = = = = = = = = = = = = = =
// INTPRD bit
#define
ET_DISABLE
0x0
#define
ET_1ST
0x1
#define
ET_2ND
0x2
#define
ET_3RD
0x3
16.2.2 Proper Interrupt Initialization Procedure
When the ePWM peripheral clock is enabled it may be possible that interrupt flags may be set due to
spurious events due to the ePWM registers not being properly initialized. The proper procedure for
initializing the ePWM peripheral is:
1. Disable global interrupts (CPU INTM flag)
2. Disable ePWM interrupts
3. Initialize peripheral registers
4. Clear any spurious ePWM flags
5. Enable ePWM interrupts
6. Enable global interrupts