Operator's Manual
WP700Zi-OM-E-RevA
446
Figure 5-52. Transition Mode.
For example, Section 4.3.3.1 of PCI Express Specification defines the requirements for Transition and Non-
transition eye diagrams:
“There are two eye diagrams that must be met for the Transmitter. Both eye diagrams must be aligned in time
using the jitter median to locate the center of the eye diagram. The different eye diagrams will differ in voltage
depending whether it is a transition bit or a de-emphasized bit. The exact reduced voltage level of the de-
emphasized bit will always be relative to the transition bit.”
Gated (Qualified) Eye Diagram
The Gated Eye Diagram mode utilizes a separate signal (the “Gate” or qualifier) to create dual eye diagrams
based on the polarity of the Gate.
Here’s an example of a gated eye diagram. Channel 1 (M1) contains the raw data and Channel 2 (M2) contains a
Gate signal. While the Gate signal is high, the UIs will transfer to Eye display; When the Gate signal goes low, the
UIs will transfer to Eye2 display
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