Operator's Manual
WP700Zi-OM-E-RevA
496
Note that the VCO Synch must exist in the acquired head signal, or the channel emulation cannot be run. The
phase and gain steering algorithm in the emulation will adjust for changes in the signal after VCO Synch,
assuming it starts correctly.
PLL and AGC
The sample, phase-steering (PLL) and gain adjust (AGC, level computation) work together, one sample at a time.
They are used to compute sampled data for input to the Viterbi detector.
ML Detector
Samples on the output of the ADC ideally have a small number of levels: {-1,0,+1} for the PR4 system, for
example. A threshold detector could be used to classify a current sample value comparing it to an amplitude
threshold. For example, if sample > 0.5, sample = 1; if sample < -0.5, sample = -1; if sample 0.5, sample = 0.
For the sequence of samples 0.8 0.3 -0.7 -0.2 0.6 0.9 1.1 0.2, the threshold detector output would be: 1 0 -1 0 1 1
1 0.
The difficulty here is that the sequence of three ones in a row ("111") is impossible: the pulse is too wide. The only
possible combinations are 011, 110, -111, and so on.
A threshold detector, such as the peak detector on a Peak-Detect drive, does not use the previous and
subsequent samples. But the maximum likelihood (ML) detector "knows" that "111" is a forbidden sequence of
samples and tries to determine the most probable data pattern for this sequence of samples (21 samples used for
PR4).
Proposing several close allowable sequences -- {1 0 -1 0 1 1 0 0} or {1 0 -1 0 0 1 1 0} or {1 0 -1 0 0 0 1 1} -- is
easy. But which is the most probable?
The decision is made based on a sequence of samples, instead of only a single, current sample, and the
sequence with the minimum distance (maximum likelihood) is selected as the detection result.
Viterbi Detector & Trellis
The Viterbi detector is a state machine consisting of two distinct parts: states and transitions. While state is the
current magnetization of the disk and some history (memorization of the latest states), transition relates the
current state to the next state. For the detector, only two possibilities exist: either the state (medium
magnetization) is the same between the current and the next bit periods or it is not.
The detector’s trellis works according to this dichotomy: "0" or "1" is followed by either "0" or "1", and so on. The
trellis is a mechanism that keeps track of a sequence of magnetization states. When the ML detector makes
decisions, it keeps the states of several consecutive time instants and estimates the likelihood of possible
"histories" (higher probability). The higher the order of the PRML system, the larger and more complex the trellis.
However, some trellises do not allow certain transitions (d=1 constraint), thereby limiting the extent to which the
pulses can overlap.
SAM
Sequenced Amplitude Margin (SAM) measures the error margin of every sample taken by a PRML channel chip.
Determining that a written bit is either a "0" or a "1" is the disk drive’s most basic decision. SAM measures the
margin by which the Viterbi detector has made this decision, the margin or distance being a function of the path
metrics and current sample taken together.
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