WavePro 7Zi
419
WP700Zi-OM-E-RevA
of n is the PLL cutoff divisor that is set from the SDA main menu. The cutoff frequency is Fd/n where Fd is the
data rate. This filter is related to its analog counterpart through a design process known as impulse invariance
and is only valid for cutoff frequencies much less than the data rate. For this reason, the minimum PLL cutoff
divisor setting is 20 in the SDA.
The factor
n
determines the number of previous values of the correction value
y
that is used in the computation of
the current correction value. This is theoretically infinite; however, practically there is a limit to the number of past
values included. One can define a “sliding window” equivalent to a number of UI (unit intervals) of the data signal
for a given value of
n
. This is useful for measuring signals such as serial ATA and PCI-Express, where the
specifications call for clock recovery over a finite window. The equivalent bandwidth of the sliding window is given
by a sin(x)/x function. The first null of this function occurs at x =
S
or ½ the bit rate (the digital equivalent of the
frequency of a signal at the sampling rate is 2
S
and the sampling rate for clock recovery is the data rate). This is
scaled by the window size to be 2
S
/ N where N is the window in UI. The 3 dB point of the sin(x)/x function is at
0.6
S
/ N or 0.3Fd/N for a window length of
N
. This gives us a relationship between
N
and
n
:
Fd/n = 0.3Fd/N or n = N/0.3
For a sliding window size of 250, the equivalent value of
n
would be 833.
Eye Pattern Theory
Figure 5-33. Histogram of Zero Crossing in Eye Pattern Showing Jitter Distribution
An eye diagram shows all values that a digital signal takes on during a bit period. A bit period (or UI) is defined by
the data clock, so some sort of data clock is needed in order to measure the eye pattern. The traditional method
of generating an eye pattern involves acquiring data on an oscilloscope, using the data clock as a trigger. One or
more samples are taken on each trigger. The samples are stored in a persistence map with the vertical dimension
equal to the signal level, and the horizontal position equal to the sample position relative to the trigger (or data
clock). As many data points are collected, the eye pattern fills in with multiple occurrences of time and amplitude
values counted by incrementing counters in each x,y “bin.” Timing jitter is indicated by the horizontal distribution of
the points around the data crossings. The histogram of the bins around the crossing points gives the distribution
of jitter amplitude.
A recovered clock is used if there is no access to a data clock. The recovered clock is normally a hardware PLL
designed to operate at specific data rates and with a cutoff frequency of Fd/1667. One of the major drawbacks of
a hardware clock recovery circuit is that jitter associated with the trigger circuit adds to the measured jitter by
creating uncertainty in the horizontal positioning of the eye pattern samples.
The SDA measures eye patterns without using a trigger. It does this by using the software clock recovery
discussed above to divide the data record into segments along the time values of the clock. For the purpose of
dividing the time line into segments, the time resolution in the waveform record is infinite. The samples occur at
fixed intervals of 50 ps/pt (for a 20 GS/s sampling rate). The samples are positioned relative to the recovered
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