Cypress S6J3200 Series, Руководство пользователя

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CHAPTER 15:12-/10-/8-bit Analog to Digital Converter
S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G 305
5.5.2.
A/D Conversion Done Interrupt Flag Register
(ADC12Bn_CDONEIRQ1)
BIT_OFFSET 31 30 29 28 27 26 25 24
BIT_NAME
CDONEIRQ6
3
CDONEIRQ6
2
CDONEIRQ6
1
CDONEIRQ6
0
CDONEIRQ5
9
CDONEIRQ5
8
CDONEIRQ5
7
CDONEIRQ5
6
ACCESS_TYPE R,WX R,WX R,WX R,WX R,WX R,WX R,WX R,WX
PROT_TYPE
INITIAL_VALUE 0 0 0 0 0 0 0 0
BIT_OFFSET 23 22 21 20 19 18 17 16
BIT_NAME
CDONEIRQ5
5
CDONEIRQ5
4
CDONEIRQ5
3
CDONEIRQ5
2
CDONEIRQ5
1
CDONEIRQ5
0
CDONEIRQ4
9
CDONEIRQ4
8
ACCESS_TYPE R,WX R,WX R,WX R,WX R,WX R,WX R,WX R,WX
PROT_TYPE
INITIAL_VALUE 0 0 0 0 0 0 0 0
BIT_OFFSET 15 14 13 12 11 10 9 8
BIT_NAME
CDONEIRQ4
7
CDONEIRQ4
6
CDONEIRQ4
5
CDONEIRQ4
4
CDONEIRQ4
3
CDONEIRQ4
2
CDONEIRQ4
1
CDONEIRQ4
0
ACCESS_TYPE R,WX R,WX R,WX R,WX R,WX R,WX R,WX R,WX
PROT_TYPE
INITIAL_VALUE 0 0 0 0 0 0 0 0
BIT_OFFSET 7 6 5 4 3 2 1 0
BIT_NAME
CDONEIRQ3
9
CDONEIRQ3
8
CDONEIRQ3
7
CDONEIRQ3
6
CDONEIRQ3
5
CDONEIRQ3
4
CDONEIRQ3
3
CDONEIRQ3
2
ACCESS_TYPE R,WX R,WX R,WX R,WX R,WX R,WX R,WX R,WX
PROT_TYPE
INITIAL_VALUE 0 0 0 0 0 0 0 0
[bit31:0] CDONEIRQ63 to 32 : Conversion Done Interrupt flags
Bit Description
0 Conversion done interrupt request not detected.
1 Conversion done interrupt request detected.
This bit is set when conversion data is stored in corresponding conversion data register
ADC12Bn_CD32 to 63 and corresponding trigger status (ADC12Bn_TRGST1.TRGST and
ADC12Bn_CHSTAT32 to 63.TRGST bits) is still "1".
This bit is cleared by writing "1" to the corresponding ADC12Bn_CDONEIRQC1 bits or by reading the
corresponding conversion data register ADC12Bn_CD32 to 63 (except by the debug master, DAP). All
ADC12Bn_CD32 to 63 read access types (8/16/32-bit) clear the flag.
If this bit is set and cleared at the same time, clearing has higher priority.
This bit is identical to the CDONEIRQ bit in the corresponding ADC12Bn_CHSTAT32 to 63 registers.