Cypress S6J3200 Series, Руководство пользователя

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CHAPTER 15:12-/10-/8-bit Analog to Digital Converter
312 S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G
5.8.
Group Interrupted Interrupt Flag Registers (ADC12Bn_GRPIRQ0 to 1)
These registers contain the status of group interrupted interrupt flags for all 64 logical channels.
REGISTER_NAME ADC12Bn_GRPIRQi (i = 0 to 1)
OFFSET i*4
ACCESS_SIZE B H W
MULTIPLE 0:1
NUMERIC_TYPE
-
OTHER
-
5.8.1.
Group Interrupted Interrupt Flag Register (ADC12Bn_GRPIRQ0)
BIT_OFFSET 31 30 29 28 27 26 25 24
BIT_NAME GRPIRQ31 GRPIRQ30 GRPIRQ29 GRPIRQ28 GRPIRQ27 GRPIRQ26 GRPIRQ25 GRPIRQ24
ACCESS_TYPE R,WX R,WX R,WX R,WX R,WX R,WX R,WX R,WX
PROT_TYPE
INITIAL_VALUE 0 0 0 0 0 0 0 0
BIT_OFFSET 23 22 21 20 19 18 17 16
BIT_NAME GRPIRQ23 GRPIRQ22 GRPIRQ21 GRPIRQ20 GRPIRQ19 GRPIRQ18 GRPIRQ17 GRPIRQ16
ACCESS_TYPE R,WX R,WX R,WX R,WX R,WX R,WX R,WX R,WX
PROT_TYPE
INITIAL_VALUE 0 0 0 0 0 0 0 0
BIT_OFFSET 15 14 13 12 11 10 9 8
BIT_NAME GRPIRQ15 GRPIRQ14 GRPIRQ13 GRPIRQ12 GRPIRQ11 GRPIRQ10 GRPIRQ9 GRPIRQ8
ACCESS_TYPE R,WX R,WX R,WX R,WX R,WX R,WX R,WX R,WX
PROT_TYPE
INITIAL_VALUE 0 0 0 0 0 0 0 0
BIT_OFFSET 7 6 5 4 3 2 1 0
BIT_NAME GRPIRQ7 GRPIRQ6 GRPIRQ5 GRPIRQ4 GRPIRQ3 GRPIRQ2 GRPIRQ1 GRPIRQ0
ACCESS_TYPE R,WX R,WX R,WX R,WX R,WX R,WX R,WX R,WX
PROT_TYPE
INITIAL_VALUE 0 0 0 0 0 0 0 0
[bit31:0] GRPIRQ31 to 0
Group Interrupted Interrupt flags for the case the group gets interrupted and stopped before finishing.
Bit Description
0 Group interrupted interrupt not detected.
1 Group interrupted interrupt detected.
The bit is set to "1" if following conditions are fulfilled:
−
The corresponding trigger status flags of the channel (ADC12Bn_CHSTAT0 to 31.TRGST and
ADC12Bn_TRGST0.TRGST31 to 0) are set to "1"