Cypress S6J3200 Series, Руководство пользователя

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CHAPTER 15:12-/10-/8-bit Analog to Digital Converter
316 S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G
5.9.2.
Group Interrupted Interrupt Enable Register
(ADC12Bn_GRPIRQE1)
BIT_OFFSET 31 30 29 28 27 26 25 24
BIT_NAME GRPIRQE63 GRPIRQE62 GRPIRQE61 GRPIRQE60 GRPIRQE59 GRPIRQE58 GRPIRQE57 GRPIRQE56
ACCESS_TYPE R/W R/W R/W R/W R/W R/W R/W R/W
PROT_TYPE
INITIAL_VALUE 0 0 0 0 0 0 0 0
BIT_OFFSET 23 22 21 20 19 18 17 16
BIT_NAME GRPIRQE55 GRPIRQE54 GRPIRQE53 GRPIRQE52 GRPIRQE51 GRPIRQE50 GRPIRQE49 GRPIRQE48
ACCESS_TYPE R/W R/W R/W R/W R/W R/W R/W R/W
PROT_TYPE
INITIAL_VALUE 0 0 0 0 0 0 0 0
BIT_OFFSET 15 14 13 12 11 10 9 8
BIT_NAME GRPIRQE47 GRPIRQE46 GRPIRQE45 GRPIRQE44 GRPIRQE43 GRPIRQE42 GRPIRQE41 GRPIRQE40
ACCESS_TYPE R/W R/W R/W R/W R/W R/W R/W R/W
PROT_TYPE
INITIAL_VALUE 0 0 0 0 0 0 0 0
BIT_OFFSET 7 6 5 4 3 2 1 0
BIT_NAME GRPIRQE39 GRPIRQE38 GRPIRQE37 GRPIRQE36 GRPIRQE35 GRPIRQE34 GRPIRQE33 GRPIRQE32
ACCESS_TYPE R/W R/W R/W R/W R/W R/W R/W R/W
PROT_TYPE
INITIAL_VALUE 0 0 0 0 0 0 0 0
[bit31:0] GRPIRQE63 to 32 : Group Interrupted Interrupt Enable bits
Bit Description
0 Group interrupted interrupt disabled.
1 Group interrupted interrupt enabled.
Group interrupted interrupt is issued when this bit is "1" and the corresponding interrupt flags
(ADC12Bn_GRPIRQ1.GRPIRQ63 to 32 and ADC12Bn_CHSTAT32 to 63.GRPIRQ) are set to "1".