Cypress S6J3200 Series, Руководство пользователя

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CHAPTER 22:Media Local Bus Interface (MediaLB)
S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G 827
In the Ping-Pong buffering, if the current buffer is filled, an interrupt occurs when moving to the next buffer
and so the next address to be used next can be set again by software. Therefore, it is possible to
transmit/receive data while changing the transfer destination data storage area one after another.
In the circular buffering, a buffer from a start address to an end address is used in a loop indefinitely by
setting the start and end addresses in Next Buffer Configuration Register (MLBn_CNBCRn) until the
software sets to "0" the RDY bit in Channel n Status Configuration Register (MLBn_CSCRn). This type of
buffering should be used only for synch channels.
For details on the DMA Mode operation, please contact SMSC.
Local Channel Buffer
The local channel buffer comprises RAM of 256 words x 36 bits, where each word contains 4 quadlets
plus tag information. The local channel buffer is in MediaLB and used by each logical channel to store
transmitted and received data temporarily. To assign a RAM area, Local Channel n Buffer Configuration
Register (MLBn_LCBCRn) is used to set the start address (SA bit) and a length (BD bit) of the RAM area.
Furthermore, in the IO mode, an interrupt can be triggered to each logical channel by setting a threshold
value (TH bit) using Local Channel n Buffer Configuration Register (MLBn_LCBCRn).
For details on the Local channel buffer operation, please contact SMSC.
Interrupts by MediaLB
This section describes interrupts that MediaLB has. MediaLB has two types of interrupts* Channel
interrupts indicating the state of each channel buffer (Cint) and System interrupts indicating the state of
the MediaLB system (Sint).
A channel interrupt is triggered by the status or error information retained by Channel n Status
Configuration Register (MLBn_CSCRn). Channel interrupts are maskable on a channel basis via the
MLBn_CECRn register. To know in which channel an interrupt has been triggered, Channel Interrupt
Configuration Register (MLBn_CICR) needs to be read. Each bit in Channel Interrupt Configuration
Register (MLBn_CICR) is cleared to 0 by clearing the factor that has triggered an interrupt to each
channel or masking the interrupt using the mask bit. The root cause of the interrupt can be determined by
reading the current and previous status fields in the MLBn_CSCRn register. The following tables describe
the interrupt flags for channel interrupts and corresponding interrupt cause factors. The interrupt flag is
changed to "1" when an interrupt cause is detected. There are bits that change the meaning of the
interrupt flag, depending on the operation mode (IO/DMA mode).
Note:
*Data interrupts (mlb_dint[30:0]) provided by SMSC IP OS62400 are not supported. Reason is that data
interrupts are provided for customers who want to attach an external DMA Controller directly to OS62400
and load/unload the local channel buffers in IO Mode.