Cypress S6J3200 Series, Руководство пользователя

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CHAPTER 15:12-/10-/8-bit Analog to Digital Converter
354 S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G
5.24.
A/D Converter Resumption Time Setting Register (ADC12Bn_RT)
ADC12Bn_RT register specifies the resumption time of the A/D converter. It is not allowed to update the
value of this register during A/D conversion operation (ADC12Bn_TRGST0 to 1.TRGST and
ADC12Bn_CHSTAT0 to 63.TRGST="1").
REGISTER_NAME ADC12Bn_RT
OFFSET 0x0392
ACCESS_SIZE B H W
MULTIPLE 1
NUMERIC_TYPE
-
OTHER
-
A/D Converter Resumption Time Setting Register (ADC12Bn_RT)
BIT_OFFSET 15 14 13 12 11 10 9 8
BIT_NAME Reserved
ACCESS_TYPE R0,W0
PROT_TYPE
INITIAL_VALUE 0x00
BIT_OFFSET 7 6 5 4 3 2 1 0
BIT_NAME RT[7] RT[6] RT[5] RT[4] RT[3] RT[2] RT[1] RT[0]
ACCESS_TYPE R/W R/W R/W R/W R/W R/W R/W R/W
PROT_TYPE
INITIAL_VALUE 0 0 1 1 1 1 1 1
[bit15:8] Reserved : Reserved bits
When writing, always write "0".
When reading, "0" is always read.
[bit7:0] RT[7:0] : A/D Converter Resumption Time Setting bits
These bits specify the resumption phase time (power-up wait time).
Please set RT value is longer than the specific values of maximum resumption time.
Do not set RT value to 0.
RT value >= Maximum resumption time / Peripheral clock period.
For specific values of maximum resumption time, please refer to the Device Data Sheet.