CHAPTER 28:LCD Controller
S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G
1067
6.8.
Segment Output Register: SEGER
This section shows the bit configuration of the
Segment output
Register
.
Segment output register (SEGER) is a register which control the segment output enable of LCD controller duty driving
driver.
SEGER
bit
31
30
29
28
27
26
25
24
Field
SEGE7
SEGE6
SEGE5
SEGE4
SEGE3
SEGE2
SEGE1
SEGE0
Attribute
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Protection
attribute
-
-
-
-
-
-
-
-
Initial
value
0
0
0
0
0
0
0
0
bit
23
22
21
20
19
18
17
16
Field
SEGE15
SEGE14
SEGE13
SEGE12
SEGE11
SEGE10
SEGE9
SEGE8
Attribute
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Protection
attribute
-
-
-
-
-
-
-
-
Initial
value
0
0
0
0
0
0
0
0
bit
15
14
13
12
11
10
9
8
Field
SEGE23
SEGE22
SEGE21
SEGE20
SEGE19
SEGE18
SEGE17
SEGE16
Attribute
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Protection
attribute
-
-
-
-
-
-
-
-
Initial
value
0
0
0
0
0
0
0
0
bit
7
6
5
4
3
2
1
0
Field
SEGE31
SEGE30
SEGE29
SEGE28
SEGE27
SEGE26
SEGE25
SEGE24
Attribute
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Protection
attribute
-
-
-
-
-
-
-
-
Initial
value
0
0
0
0
0
0
0
0
[bit31:0] SEGEn (n=0 to 31)
SEGEn(n=0 to 31)
Operation
0
Disable LCDC segment output
1
Enable LCDC segment output
Содержание S6J3200 Series
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