CHAPTER 27:HyperBus Interface
1024
S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G
4.4.
Memory Base Address Register (HYPERBUSIn_MBR0 to 1)
The base address for each memory space is set up.
REGISTER_NAME
HYPERBUSIn_MBRi
OFFSET
0x10 + i*4
ACCESS_SIZE
B H W
MULTIPLE
0:1
NUMERIC_TYPE
OTHER
Table 4-4 HYPERBUSI Memory Base Address Register Description
BIT_OFFSET
31
30
29
28
27
26
25
24
BIT_NAME
A[31]
A[30]
A[29]
A[28]
A[27]
A[26]
A[25]
A[24]
ACCESS_TYPE
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
PROT_TYPE
-
INITIAL_VALUE
0
0
0
0
0
0
0
0
BIT_OFFSET
23
22
21
20
19
18
17
16
BIT_NAME
A[23]
A[22]
A[21]
A[20]
A[19]
A[18]
A[17]
A[16]
ACCESS_TYPE
R0,WX
R0,WX
R0,WX
R0,WX
R0,WX
R0,WX
R0,WX
R0,WX
PROT_TYPE
-
INITIAL_VALUE
0
0
0
0
0
0
0
0
BIT_OFFSET
15
14
13
12
11
10
9
8
BIT_NAME
A[15]
A[14]
A[13]
A[12]
A[11]
A[10]
A[9]
A[8]
ACCESS_TYPE
R0,WX
R0,WX
R0,WX
R0,WX
R0,WX
R0,WX
R0,WX
R0,WX
PROT_TYPE
-
INITIAL_VALUE
0
0
0
0
0
0
0
0
BIT_OFFSET
7
6
5
4
3
2
1
0
BIT_NAME
A[7]
A[6]
A[5]
A[4]
A[3]
A[2]
A[1]
A[0]
ACCESS_TYPE
R0,WX
R0,WX
R0,WX
R0,WX
R0,WX
R0,WX
R0,WX
R0,WX
PROT_TYPE
-
INITIAL_VALUE
0
0
0
0
0
0
0
0
[bit31:0] A[31:0] : Memory Base Address
The base address of addressable region to each memory is set up. Since register can be set in 16M
bytes boundary, lower 24 bit is fixed to 0. MBR1 register base address must be larger than MBR0
register
Содержание S6J3200 Series
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