Cypress S6J3200 Series, Руководство пользователя

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CHAPTER 16:Stepper Motor Controller
S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G 375
PWM Clock Prescaler
The PWM Clock Prescaler divides the Peripheral clock (CLKP) and generates the PWM operating clock.
The PWM operating clock is used by the PWM Pulse Generators.
PWM1 Pulse Generator / PWM2 Pulse Generator
The PWM Pulse Generators generate the pulse-width modulated signals according to the waveform
configuration and the selected operation mode.
Selector
This sub-module, based on configuration, selects the level of the signal that will be sent to the Stepper
Motor Controller output pins.
Port
The Port controls the I/O port for the Stepper Motor Controller pins.
PWM Control Register (PWC)
The PWM Control Register (PWC) starts/stops the Stepper Motor Controller, sets the PWM Prescaler and
selects the operation mode for the PWM Pulse Generators.
PWM1 and PWM2 Compare Registers (PWC1, PWC2)
The PWM1 and PWM2 Compare Registers determine the PWM pulse width.
PWM Selection Register (PWS)
The PWM Selection Register selects the signal levels ("H" and "L", PWM pulse and "Hi-Z") to be output to
the Stepper Motor Controller pins. It also sets the update instruction for the system to synchronize the
PWM Pulse Generators.
SMC Trigger Delay Register (PTRGDL)
The SMC Trigger Delay Register (PTRGDL) is used to delay the start of the operation by 0 to 255 clock
cycles.
Set Logic for PWC.CE
The Set logic for PWC.CE receives the trigger and waits for a configured delay time and sets
automatically PWC.CE bit.