CHAPTER 17:Trigger Configuration of Stepper Motor Controller
402
S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G
4.1.
SMC Trigger Selection Register (SMCTGg_PTRGS)
The SMC Trigger Selection Register (SMCTGg_PTRGS) selects multiple SMC channels that shall be
triggered by the SMC Trigger Register to start operation synchronously or with a delay. The SMC
channels can be combined into two trigger groups.
REGISTER_NAME
SMCTGg_PTRGS
OFFSET
0x00000000
ACCESS_SIZE
B, H
MULTIPLE
0
NUMERIC_TYPE
-
OTHER
-
BIT_OFFSET
15
14
13
12
11
10
9
8
BIT_NAME
Reserved
S25
S24
S23
S22
S21
S20
ACCESS_TYPE
R0,WX
R/W
R/W
R/W
R/W
R/W
R/W
PROT_TYPE
Rp/Wp
INITIAL_VALUE
0
0
0
0
0
0
0
BIT_OFFSET
7
6
5
4
3
2
1
0
BIT_NAME
Reserved
S15
S14
S13
S12
S11
S10
ACCESS_TYPE
R0,WX
R/W
R/W
R/W
R/W
R/W
R/W
PROT_TYPE
Rp/Wp
INITIAL_VALUE
0
0
0
0
0
0
0
[bit13] S25 : Trigger Enable for Operation of SMC<6*g+5>
This bit selects SMC<6*g+5> for the SMC trigger group S2 (triggered by SMCTGg_PTRG:TR2).
Bit
Description
0
SMC<6*g+5> is not triggered by SMCTGg_PTRG:TR2
1
SMC<6*g+5> is triggered by SMCTGg_PTRG:TR2
[bit12] S24 : Trigger Enable for Operation of SMC<6*g+4>
This bit selects SMC<6*g+4> for the SMC trigger group S2 (triggered by SMCTGg_PTRG:TR2).
Bit
Description
0
SMC<6*g+4> is not triggered by SMCTGg_PTRG:TR2
1
SMC<6*g+4> is triggered by SMCTGg_PTRG:TR2
Содержание S6J3200 Series
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