Cypress S6J3200 Series, Руководство пользователя

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CHAPTER 32:Memory Protection Unit for AHB
1162 S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G
1.
Overview
This section describes the features of the MPU AHB.

Features of MPU AHB
The MPU AHB module monitors the accesses from AHB Masters and checks each access against an
authorized set of Access Permissions. Access Permissions (known as "permission attributes" from here
onwards) are defined by Access Permissions (AP) bits. These AP bits are explained in Section MPU
access permissions.
The MPU AHB provides eight regions and one background region. Each region has corresponding
Access Permission bits that define the permission attributes for that particular region. Any unauthorized
access to that memory space is flagged using a non-maskable interrupt. MPU AHB also collects
information about unauthorized bus access and stores it in its internal registers.
The features of the MPU AHB module are listed in this section:
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Each of the eight regions in MPU AHB is specified using corresponding start address and end
address
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The background region covers the entire 4GB address space
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With an unauthorized access, the MPU AHB generates an NMI to the CPU
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The MPU AHB collects information about the AHB Master bus access that
caused the unauthorized access
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It supports 8-, 16- and 32-bit bus accesses for the configuration of the MPU AHB registers
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It supports lock and unlock feature to protect registers from illegal write accesses
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The modification of registers in the MPU AHB is only allowed in privileged mode
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MPU AHB registers can be written only after execution of the unlock sequence
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It supports an MPU STOP feature that allows blocking of all the accesses to memory space
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It optionally supports a privileged mode overwrite feature that allows the privilege attribute of the
memory side AHB interface to be overwritten