Cypress S6J3200 Series, Руководство пользователя

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CHAPTER 25:Programmable CRC
970 S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G
4.4.
CRC Configuration Register (CRCn_CFG)
The CRC Configuration Register (CRCn_CFG) is used to set the operation mode of the CRC module.
CRCn_CFG register describes the polynomial/checksum length, input data size, and input/output bit/byte
reflection. It indicates the status of CRC operation. Interrupt and DMA requests are also configured using
CRCn_CFG register.
CRC Configuration Register (CRCn_CFG)
BIT_OFFSET 31 30 29 28 27 26 25 24
BIT_NAME read0 read0 read0 LOCK read0 CDEN CIEN CIRQ
ACCESS_TYPE R0,WX R0,WX R0,WX R,WX R0,WX R/W R/W R,WX
PROT_TYPE Rp/Wp
INITIAL_VALUE 0 0 0 0 0 0 0 0
BIT_OFFSET 23 22 21 20 19 18 17 16
BIT_NAME SZ[1] SZ[0] LEN[5] LEN[4] LEN[3] LEN[2] LEN[1] LEN[0]
ACCESS_TYPE R/W R7W R/W R7W R/W R/W R/W R/W
PROT_TYPE Rp/Wp
INITIAL_VALUE 1 1 1 0 0 0 0 0
BIT_OFFSET 15 14 13 12 11 10 9 8
BIT_NAME read0 read0 read0 read0 RIBIT RIBYT ROBIT ROBYT
ACCESS_TYPE R0,WX R0,WX R0,WX R0,WX R/W R/W R/W R/W
PROT_TYPE Rp/Wp
INITIAL_VALUE 0 0 0 0 0 0 0 0
BIT_OFFSET 7 6 5 4 3 2 1 0
BIT_NAME read0 read0 read0 read0 read0 read0 read0 CIRQCLR
ACCESS_TYPE R0,WX R0,WX R0,WX R0,WX R0,WX R0,WX R0,WX R0,W
PROT_TYPE Rp/Wp
INITIAL_VALUE 0 0 0 0 0 0 0 0
[bit31:29] read0 : -
[bit28] LOCK : CRC Engine Status bit
This bit indicates the status of the CRC engine.
Bit Description
0 CRC engine is ready, new data can be written to CRC registers
1
CRC engine is busy and writing to CRC registers is not possible. If the data is written to the CRC
registers when LOCK bit is "1", then an error response is generated
[bit27] read0 : -