Cypress S6J3200 Series, Руководство пользователя

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CHAPTER 28:LCD Controller
1074 S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G
7.3.
How can I Setting the Frame Cycle?
This section shows how to set pins to COM output pins or SEG output pins.
<Duty drive>
The frame cycle can be set with the frame cycle bits (LCR0: FP [1:0]).The following settings are available.
Frame Cycle
(When a Main Clock Is Selected)
Selection Value
Frame Cycle Bits (FP[1:0])
(2
11
× N)/ Main clock frequency Set "00".
(2 12 × N)/ Main clock frequency Set "01".
(2 13 × N)/ Main clock frequency Set "10".
(2 14 × N)/ Main clock frequency Set "11".
N (Time division number) = Value of MS [1:0] + "1"
Frame Cycle
(When a Sub Clock Is Selected)
Selection Value
Frame Cycle Bits (FP[1:0])
(2
3
× N)/ Sub clock frequency Set "00".
(2 4 × N)/ Sub clock frequency Set "01".
(2 5 × N)/ Sub clock frequency Set "10".
(2 6 × N)/ Sub clock frequency Set "11".
N (Time division number) = Value of MS [1:0] + "1"
< Static drive >
The frame cycle can be set with the frame cycle bits (LCRS: FPS [1:0]).The following settings are
available.
Frame Cycle
Selection Value
Frame Cycle Bits (FPS[1:0])
(2 11 × 4)/Main clock (F
CL
) Set "00".
(2
12
× 4)/ Main clock (F
CL
) Set "01".
(2
13
× 4)/ Main clock (F
CL
) Set "10".
(2
14
× 4)/ Main clock (F
CL
) Set "11".