Cypress S6J3200 Series, Руководство пользователя

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CHAPTER 30:FPD-Link Converter
S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G 1119
3.
Operation
3.1.
Register IF
The register interface complies with the AMBA3 APB protocol specification. PSIZE[1:0] is expanded to
support byte/half-word access as well. If the connected APB bus is not PSIZE expanded, PSIZE[1:0] is
fixed to word access ("b10").
The table below describes PSIZE/PADDR processing when reading and writing.
PWRITE PSIZE[1:0] PADDR[1:0] Description
READ ** 00
When reading, the lower two bits of PADDR are masked to "00",
processing is word read. Select valid bytes on the master side.
WRITE
00(Byte) ** Write processes only byte that corresponds to PADDR[1:0].
01(Hword) *0
"0" masks PADDR[0] and write processes Hword lane that
corresponds to PADDR[1:0].
10(Word) 00
"00" masks PADDR[1:0] performs Word Write process.
Example: When word writing is performed at address 0x5, address
0x4 is processed as word write.
11 ** Disabled (PSLVERR)
The conditions below are when this module will return a slave error.
1. Reserved (address without a register) area access
2. Byte/Hword access of an area of register reserved bits only
3. In the LOCK state, writing anywhere other than the UNLOCK Register
4. Access with PSIZE="11" (Double Word)
3.2.
Output Signal Selection for FPD-Link
1 Channel is selected in accordance with the CH_SEL register setting and output is from display output
signal Channel 2 of the Graphic Subsystem to the FPD-Link.
The signal output to TXn[6:0] is specified by the TXn Configuration register CH_NUM bit. Supported
settings are the RXn of the channel selected above, or a fixed value. The fixed value is 7-bit data set in
the TXn Configuration register IMD_DAT.
The signal output to TXn can be inverted in accordance with the setting of the Configuration register INV
bit. This function makes it po/- swap the FPD-Link external output signal.
To configure TXn Configuration register settings, UNLOCK needs to be written to the Unlock Register in
order to release LOCK. Attempting to write in the LOCK state returns an error (PSLVERR).