Motorola MPC8260 PowerQUICC II, User Manual

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MOTOROLA Chapter 27. Multi-Channel Controllers (MCCs) 27-9
Part IV. Communications Processor Module
27.6.1 Internal Transmitter State (TSTATE)
Internal transmitter state (TSTATE) is a 4-byte register provides transaction parameters
associated with SDMA channel accesses (like function code registers) and starts the
transmitter channel.
To start the channel, write 0xHH800000 to TSTATE, where HH is the TSTATE high byte
(see Figure 27-6). When the channel is active, the CP changes the value of the three LSBs,
hence these 3 bytes must be masked if the user reads back the TSTATE.
TSTATE high-byte Þelds are described in Table 27-4.
27.6.2 Interrupt Mask (INTMSK)
The interrupt mask (INTMSK) provides in bits for enabling/disabling each event deÞned in
the interrupt circular table entry.
Bits 0 1 2 3 4 5 6 7
Field Ñ GBL BO TC2 DTB BDB
Reset Ñ
R/W R/W
Figure 27-6. TSTATE High Byte
Table 27-4. TSTATE High-Byte Field Descriptions
Bits Name Description
0Ð1 Ñ Reserved, should be cleared.
2 GBL Global. Setting GLB activates snooping (only the 60X bus can be snooped, this parameter is
ignored for local bus transactions).
3Ð4 BO Byte ordering. Set BO to select the required byte ordering for the buffer. If BO is changed on-the-ßy,
it takes effect at the beginning of the next frame or at the beginning of the next BD.
00 Reserved
01 PowerPC little-endian.
1x Big-endian
5 TC2 Transfer code. Contains the transfer code value of TC[2], used during this SDMA channel memory
access. TC[0Ð1] is driven with a 0b11 to identify this SDMA channel access as a DMA-type access.
6 DTB Data bus indicator. Selects the bus that handles transfers to and from data buffers.
0 60x bus SDMA
1 Local bus SDMA
7 BDB BD bus. Seects the bus that handles transfers to/from BD and interrupt circular tables.
0 60x bus SDMA used for accessing BDs
1 Local bus SDMA used for accessing BDs