6-36
System Design
AMD-K5 Processor Technical Reference Manual
18524C/0—Nov1996
Figure 6-6. Clock Control State Transitions
EADS
EADS
HLT Instruction
Stop Grant
State
Normal Mode
- Real
- Virtual-8086
- Protected
- SMM
Halt
State
Stop Clock
State
RESET, SMI, INIT,
or INTR Asserted
Stop Grant
Inquire
State
STPCLK Asserted
STPCLK Negated,
or RESET Asserted
STPCLK Asserted
STPCLK Negated
CLK
Started
CLK
Stopped
Summary of Contents for AMD-K5
Page 1: ...AMD K5 Processor Technical Reference Manual TM...
Page 10: ...x AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 24: ...1 4 Overview AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 54: ...2 30 Internal Architecture AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 116: ...4 26 Performance AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 356: ...6 44 System Design AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 380: ...7 24 Test and Debug AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 396: ...A 16 AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 406: ...I 10 Index AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...