Signal Descriptions
5-127
18524C/0—Nov1996
AMD-K5 Processor Technical Reference Manual
5.2.50
TCK (Test Clock)
Input
Summary
TCK is the clock for boundary-scan testing using the Test
Access Port (TAP).
Sampled
The processor always samples TCK, except while RESET or
INIT is asserted. The signal has an internal pullup resistor.
Details
Data and state definition are clocked into the processor on the
rising edge of TCK. The outputs on TDO are driven valid on the
falling edge of TCK. When TCK stops on its falling edge, the
state of test latches in the processor are held.
Section 7.8 on page 7-19 summarizes the implementation of
TAP testing on the AMD-K5 processor. System logic should tie
TCK High if TAP testing is not implemented.
See the IEEE Standard Test Access Port and Boundary-Scan
Architecture (IEEE 1149.1) specification for details on how the
TAP signals and instructions are used for testing. The TAP is
often called the Joint Test Action Group (JTAG) port, after the
committee that proposed the IEEE TAP standard.
Summary of Contents for AMD-K5
Page 1: ...AMD K5 Processor Technical Reference Manual TM...
Page 10: ...x AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 24: ...1 4 Overview AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 54: ...2 30 Internal Architecture AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 116: ...4 26 Performance AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 356: ...6 44 System Design AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 380: ...7 24 Test and Debug AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 396: ...A 16 AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 406: ...I 10 Index AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...