5-32
Bus Interface
AMD-K5 Processor Technical Reference Manual
18524C/0—Nov1996
5.2.7
APCHK (Address Parity Check)
Output
Summary
The processor asserts APCHK if an even-parity error occurs on
A31–A5 during an inquire cycle.
Driven
The processor drives APCHK for one clock, two clocks after
system logic asserts EADS with an inquire address.
APCHK is driven under the same conditions in which EADS is
sampled: See the description of EADS on page 5-58.
Details
System logic can use APCHK to initiate a remedy for the error.
Typical PC systems assert an interrupt such as NMI if a parity
error is detected.
See the description of parity error determination for the AP
input on page 5-31. Systems that do not implement address par-
ity checking should ignore APCHK.
Summary of Contents for AMD-K5
Page 1: ...AMD K5 Processor Technical Reference Manual TM...
Page 10: ...x AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 24: ...1 4 Overview AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 54: ...2 30 Internal Architecture AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 116: ...4 26 Performance AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 356: ...6 44 System Design AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 380: ...7 24 Test and Debug AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 396: ...A 16 AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 406: ...I 10 Index AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...