3-6
Software Environment and Extensions
AMD-K5 Processor Technical Reference Manual
18524C/0—Nov1996
Figure 3-3. 4-Mbyte Paging Mechanism
To enable the 4-Mbyte paging option:
1. Set the Page Size Extension (PSE) bit in CR4 to 1.
2. Set the Page Size (PS) bit in the page-directory entry to 1.
3. Write the physical base addresses of 4-Mbyte pages in bits
31–22 of page-directory entries. (Bits 21–12 of these entries
must be cleared to 0 or the processor will generate a page
fault.)
4. Load CR3 with the base address of the page directory that
contains these page-directory entries.
Linear Address
4-Mbyte
Page
Directory
4-Mbyte
Page
CR3
0
21
31
22
Page Directory
Offset
Page
Offset
PDE
Byte
Summary of Contents for AMD-K5
Page 1: ...AMD K5 Processor Technical Reference Manual TM...
Page 10: ...x AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 24: ...1 4 Overview AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 54: ...2 30 Internal Architecture AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 116: ...4 26 Performance AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 356: ...6 44 System Design AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 380: ...7 24 Test and Debug AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 396: ...A 16 AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 406: ...I 10 Index AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...