Cache and TLB Testing
7-9
18524C/0—Nov1996
AMD-K5 Processor Technical Reference Manual
7.4.2
Array Pointer
The array pointers entered in EDX (Figures 7-3 through 7-8,
top) specify particular array locations. For example, in the
data- and instruction-cache arrays, the way (or column) and set
(or index) in the array pointer specifies a cache line in the 4-
way, set-associative array. The array pointers for data-cache
data and instruction-cache instructions further specify a dword
location within that cache line. In the data cache, this dword is
32 bits of data. In the instruction cache, this dword is two
instruction bytes plus their associated pre-decode bits. For the
4-Kbyte TLB, the way and set specify one of the 128 TLB
entries. For the 4-Mbyte TLB, one of only four entries is speci-
fied.
Bits 7–0 of every array pointer encode the array ID, which iden-
tifies the array to be accessed, as shown in Table 7-3. To sim-
plify multiple accesses to an array, the contents of EDX is
retained after the RDMSR instruction executes (EDX is nor-
mally cleared after a RDMSR instruction).
Table 7-3. Array IDs in Array Pointers
Array Pointer
Bits 7–0
Accessed Array
E0h
Data Cache: Data
E1h
Data Cache: Linear Tag
ECh
Data Cache: Physical Tag
E4h
Instruction Cache: Instructions
E5h
Instruction Cache: Linear Tag
EDh
Instruction Cache: Physical Tag
E6h
Instruction Cache: Valid Bits
E7h
Instruction Cache: Branch-Prediction Bits
E8h
4-Kbyte TLB: Page
E9h
4-Kbyte TLB: Linear Tag
EAh
4-Mbyte TLB: Page
EBh
4-Mbyte TLB: Linear Tag
Summary of Contents for AMD-K5
Page 1: ...AMD K5 Processor Technical Reference Manual TM...
Page 10: ...x AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 24: ...1 4 Overview AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 54: ...2 30 Internal Architecture AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 116: ...4 26 Performance AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 356: ...6 44 System Design AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 380: ...7 24 Test and Debug AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 396: ...A 16 AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 406: ...I 10 Index AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...