New Instructions
3-35
18524C/0—Nov1996
AMD-K5 Processor Technical Reference Manual
3.3.6
RSM
mnemonic
opcode
description
RSM
0FAA
Resume execution (exit System Management Mode)
Privilege:
CPL = 0
Registers Affected:
CS, DS, ES, FS, GS, SS, EIP, EFLAGS, LDTR,
CR3, EAX, EBX, ECX, EDX, ESP, EBP, EDI, ESI
Flags Affected:
none
Exceptions Generated: Real, Virtual-8086 mode—Invalid opcode if not in SMM
Protected mode—Invalid opcode if not in SMM
Protected mode—GP(0) if CPL not = 0
The RSM instruction should be the last instruction in any System Management Mode
(SMM) service routine. It restores the processor state that was saved when the SMI
interrupt was asserted. This instruction is only valid when the processor is in SMM. It
generates an invalid opcode exception at all other times.
The processor enters the Shutdown state if any of the following illegal conditions are
encountered during the execution of the RSM instruction: the SMM base value is not
aligned on a 32-Kbyte boundary, or any reserved bit of CR4 set to 1, or the PG bit is
set while the PE is cleared in CR0, or the NW bit it set while the CD bit is cleared in
CR0.
Summary of Contents for AMD-K5
Page 1: ...AMD K5 Processor Technical Reference Manual TM...
Page 10: ...x AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 24: ...1 4 Overview AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 54: ...2 30 Internal Architecture AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 116: ...4 26 Performance AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 356: ...6 44 System Design AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 380: ...7 24 Test and Debug AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 396: ...A 16 AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 406: ...I 10 Index AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...