5-10
Bus Interface
AMD-K5 Processor Technical Reference Manual
18524C/0—Nov1996
External Interrupts, Interrupt Acknowledgments, and Reset
BUSCHK
29
I
38
29
16
3
12
12
FLUSH
27
I
41
41
41
41
12
INIT
27
I
30
30
30
30
12
9
—
INTR
5, 28
I
40
40
40
40
NMI
27
I
12
9
PRDY
O
—
R/S
28
I
31
RESET
I
30
30
30
30
—
17
SMI
27
I
12
22
SMIACT
O
—
32
STPCLK
28
I
34
34
34
34
24
Test and Debug
FRCMC
I
IERR
O
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
PRDY
O
See “External Interrupts, Interrupt Acknowledgments, and Reset”
R/S
I
See “External Interrupts, Interrupt Acknowledgments, and Reset”
TCK
I
TDI
I
TDO
O
TMS
I
TRST
I
Bus and Processor Clock
BF
I
11
BF1–BF0
I
11
CLK
I
11
Table 5-2. Conditions for Driving and Sampling Signals (continued)
Signal
Conditions under which signals are meaningfully driven or sampled
Bus Cycles or Cache Accesses
38
Arbitration
States and Modes
8
Reset,
Debug
Me
mory Re
ads
14
Me
mory Writes
14
Ca
che H
its
39
In
quire Cycles
3
I/O Cy
cl
es
Lo
ck
ed Cyc
les
Sp
ec
ial Cy
cle
s
In
terr
up
t Ackn
ow.
AHOL
D Active
BOFF
Active
HLDA Activ
e
Shutdown
33
Halt
St
op
Gr
an
t
St
op Clock
SMIACT
Active
RE
SET
Active
INIT A
ctiv
e
PR
D
Y Active
Summary of Contents for AMD-K5
Page 1: ...AMD K5 Processor Technical Reference Manual TM...
Page 10: ...x AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 24: ...1 4 Overview AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 54: ...2 30 Internal Architecture AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 116: ...4 26 Performance AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 356: ...6 44 System Design AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 380: ...7 24 Test and Debug AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 396: ...A 16 AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 406: ...I 10 Index AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...