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Software Environment and Extensions
AMD-K5 Processor Technical Reference Manual
18524C/0—Nov1996
The above value in ECX identifies the register to be read or written. The EDX and
EAX registers contain the MSR values to be read or written, as follows:
■
EDX—Upper 32 bits of MSR. For the AAR, this contains the array pointer and (in
contrast to all other MSRs) its contents are not altered by a RDMSR instruction.
■
EAX—Lower 32 bits of MSR. For the AAR, this contains the data to be read/writ-
ten.
All MSRs are 64 bits wide. However, the upper 32 bits of the AAR are write-only and
are not returned on a read. EDX remains unaltered, making it more convenient to
maintain the array pointer.
If an attempt is made to execute either the RDMSR or WRMSR instruction when
CPL is greater than 0, or to access an undefined model-specific register, the proces-
sor generates a general-protection exception with error code zero.
Model-specific registers, as their name implies, may or may not be implemented by
later models of the AMD-K5 processor.
Summary of Contents for AMD-K5
Page 1: ...AMD K5 Processor Technical Reference Manual TM...
Page 10: ...x AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 24: ...1 4 Overview AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 54: ...2 30 Internal Architecture AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 116: ...4 26 Performance AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 356: ...6 44 System Design AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 380: ...7 24 Test and Debug AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 396: ...A 16 AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 406: ...I 10 Index AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...