7-10
Test and Debug
AMD-K5 Processor Technical Reference Manual
18524C/0—Nov1996
7.4.3
Array Test Data
EAX specifies the test data to be read or written with the
RDMSR or WRMSR instruction (see Figures 7-3 through 7-8).
For example, in Figure 7-3 (top) the array pointer in EDX spec-
ifies a way and set within the data-cache linear tag array (E1h
in bits 7–0 of the array pointer) or the physical tag array (ECh
in bits 7–0 of the array pointer). If the linear tag array (E1h)
were accessed, the data read or written includes the tag and
the status bits. The details of the valid fields in EAX are shown
in Appendix A of the AMD-K5 Processor Software Development
Guide, order# 20007.
Figure 7-3. Test Formats: Data-Cache Tags
EDX: Array Pointer
0
31 30 29 28 27
0 0
Array ID
(E1h, ECh)
Way
0 0 0 0 0 0 0 0
Set
0 0 0 0 0
EAX: Test Data
(E1h) Linear Tag
(ECh) Physical Tag
0
0 0 0 0
Valid Bits
0
0 0 0 0 0 0 0 0 0
Valid Bits
8
7
12
13
18
19
31
28 27
31
23 22
Summary of Contents for AMD-K5
Page 1: ...AMD K5 Processor Technical Reference Manual TM...
Page 10: ...x AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 24: ...1 4 Overview AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 54: ...2 30 Internal Architecture AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 116: ...4 26 Performance AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 356: ...6 44 System Design AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 380: ...7 24 Test and Debug AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 396: ...A 16 AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 406: ...I 10 Index AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...