3-24
Software Environment and Extensions
AMD-K5 Processor Technical Reference Manual
18524C/0—Nov1996
3.1.5
Protected Virtual Interrupt (PVI) Extensions
The Protected Virtual Interrupts (PVI) bit in CR4 enables sup-
port for interrupt virtualization in Protected mode. In this vir-
tualization, the processor maintains program-specific VIF and
VIP flags in a manner similar to those in Virtual-8086 Mode
Extensions (VME). When a program is executed at CPL = 3, it
can set and clear its copy of the VIF flag without causing gen-
eral-protection exceptions.
The only differences between the VME and PVI extensions are
that, in PVI, selective INTn interception using the Interrupt
Redirection Bitmap in the TSS does not apply, and only the STI
and CLI instructions are affected by the extension.
Table 3-5A through Table 3-5E and Table 3-6 show, among
other things, the behavior of hardware and software inter-
rupts, and instructions that affect interrupts, in Protected
mode with the PVI extensions enabled.
Summary of Contents for AMD-K5
Page 1: ...AMD K5 Processor Technical Reference Manual TM...
Page 10: ...x AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 24: ...1 4 Overview AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 54: ...2 30 Internal Architecture AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 116: ...4 26 Performance AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 356: ...6 44 System Design AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 380: ...7 24 Test and Debug AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 396: ...A 16 AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 406: ...I 10 Index AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...