3-30
Software Environment and Extensions
AMD-K5 Processor Technical Reference Manual
18524C/0—Nov1996
3.3.2
CMPXCHG8B
mnemonic
opcode
description
CMPXCHG8B
r/m64
0FC7
Compare and exchange 8-byte operand
Privilege:
Any level
Registers Affected:
EAX, EBX, ECX, EDX
Flags Affected:
ZF
Exceptions Generated: Real, Virtual-8086, Protected mode—GP(0) for all standard cases. Invalid opcode if
destination is a register.
Virtual-8086 mode—Page fault
The CMPXCHG8B instruction is an 8-byte version of the 4-byte CMPXCHG instruc-
tion supported by the 486 processor. CMPXCHG8B compares a value from memory
with a value in the EDX and EAX register, as follows:
■
EDX—Upper 32 bits of compare value
■
EAX—Lower 32 bits of compare value
If the memory value matches the value in EDX and EAX, the ZF flag is set to 1 and
the 8-byte value in ECX and EBX is written to the memory location, as follows:
■
ECX—Upper 32 bits of exchange value
■
EBX—Lower 32 bits of exchange value
Summary of Contents for AMD-K5
Page 1: ...AMD K5 Processor Technical Reference Manual TM...
Page 10: ...x AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 24: ...1 4 Overview AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 54: ...2 30 Internal Architecture AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 116: ...4 26 Performance AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 356: ...6 44 System Design AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 380: ...7 24 Test and Debug AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 396: ...A 16 AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 406: ...I 10 Index AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...