Code Optimization
4-1
18524C/0—Nov1996
AMD-K5 Processor Technical Reference Manual
4
Performance
This chapter provides information to assist fast execution and
details on dispatch and execution timing for x86 instructions.
Throughout the chapter, the terms clock and cycle refer to pro-
cessor clock cycles, not bus clock (CLK) cycles.
4.1
Code Optimization
The code optimization suggestions in this section cover both
general superscalar optimization (that is, techniques common
to both the AMD-K5 and Pentium processors) and techniques
specific to the AMD-K5 processor. In general, all optimization
techniques used for the Pentium processor apply to any wide-
issue x86 processor, but wider-issue designs like the AMD-K5
processor have fewer restrictions.
4.1.1
General Superscalar Techniques
■
Short Forms—Use shorter forms of instructions to increase
the effective number of instructions that can be examined
for decoding at any one time. Use 8-bit displacements and
jump offsets where possible.
■
Simple Instructions—Use simple instructions with hard-
wired decode because they often perform more efficiently.
Summary of Contents for AMD-K5
Page 1: ...AMD K5 Processor Technical Reference Manual TM...
Page 10: ...x AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 24: ...1 4 Overview AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 54: ...2 30 Internal Architecture AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 116: ...4 26 Performance AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 356: ...6 44 System Design AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 380: ...7 24 Test and Debug AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 396: ...A 16 AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 406: ...I 10 Index AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...