Signal Descriptions
5-115
18524C/0—Nov1996
AMD-K5 Processor Technical Reference Manual
If memory reads, memory writes, or I/O reads are misaligned,
the AMD-K5 processor runs the bus cycles in the opposite
order of the Pentium processor. The AMD-K5 processor trans-
fers the low-address portion followed by the high-address por-
tion instead of the high-address portion followed by the low-
address portion.
I/O writes, however, are performed in the same order on both
processors.
Summary of Contents for AMD-K5
Page 1: ...AMD K5 Processor Technical Reference Manual TM...
Page 10: ...x AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 24: ...1 4 Overview AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 54: ...2 30 Internal Architecture AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 116: ...4 26 Performance AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 356: ...6 44 System Design AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 380: ...7 24 Test and Debug AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 396: ...A 16 AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 406: ...I 10 Index AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...