5-8
Bus Interface
AMD-K5 Processor Technical Reference Manual
18524C/0—Nov1996
Table 5-2. Conditions for Driving and Sampling Signals
Signal
Conditions under which signals are meaningfully driven or sampled
Bus Cycles or Cache Accesses
38
Arbitration
States and Modes
8
Reset,
Debug
Mem
or
y Rea
ds
14
Mem
or
y Wr
ites
14
Cache Hits
39
Inqui
re
Cycles
3
I/
O Cy
cle
s
Lo
ck
ed Cy
cl
es
Spe
cia
l Cyc
les
Inte
rrupt Acknow.
AHOLD Active
BOFF
Active
HLDA Ac
tive
Shu
tdown
33
Halt
Stop
Gran
t
Stop
Clock
SMI
A
CT
Active
RES
ET Active
INIT Active
PRDY Active
Bus Arbitration
AHOLD
I
23
—
BOFF
I
—
BREQ
O
38
HLDA
O
39
35
—
HOLD
I
35
Address and Address Parity
A20M
I
10
10
10
10
10
10
10
10
10
A31–A3
2
I/O
44
19
19
7
4
4
3
3
3
AP
I/O
38
7
4
4
3
3
3
ADS
O
38
37
3
3
3
3
ADSC
O
38
37
3
3
3
3
APCHK
O
7
3
3
3
3
3
3
3
3
BE7–BE0
38
37
16
3
3
3
Cycle Definition and Control
D/C
O
38
37
16
3
3
3
EWBE
I
37
26
26
3
3
3
LOCK
O
38
1
—
16
M/IO
O
38
37
16
3
3
3
NA
18
I
18
18
18
16
18
SCYC
O
13
13
13
13
13
W/R
O
38
37
16
3
3
3
Summary of Contents for AMD-K5
Page 1: ...AMD K5 Processor Technical Reference Manual TM...
Page 10: ...x AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 24: ...1 4 Overview AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 54: ...2 30 Internal Architecture AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 116: ...4 26 Performance AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 356: ...6 44 System Design AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 380: ...7 24 Test and Debug AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 396: ...A 16 AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 406: ...I 10 Index AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...