Signal Descriptions
5-101
18524C/0—Nov1996
AMD-K5 Processor Technical Reference Manual
5.2.40
PCHK (Parity Status)
Output
Summary
The processor asserts PCHK during reads if it detects an even
parity error on one or more bytes of D63–D0 during a read
cycle.
Driven
The processor drives PCHK for one clock, two clocks after each
BRDY during read cycles.
PCHK is driven for memory and I/O reads, locked reads, and
interrupt acknowledge operations in the normal operating
modes (Real, Protected, and Virtual-8086) and in SMM, or
while PRDY is asserted. PCHK is not driven during any type of
write cycles or special bus cycles; or during the Shutdown,
Halt, Stop Grant, or Stop Clock states; or while BOFF, HLDA,
RESET, or INIT is asserted. While AHOLD is asserted, PCHK
is driven only to complete a bus cycle already begun before the
assertion of AHOLD.
Details
To determine data parity, the bit value driven on DP7–DP0 is
considered with the bit values driven on D63–D0. If the total
number of 1 bits is even for DP7–DP0 and D63–D0, the byte is
considered free of error (thus the term even parity). If the num-
ber of 1 bits is odd, the byte is considered to have an error.
During burst reads, the processor checks all eight bytes of
D63–D0 for errors, with respect to the even parity bit sampled
on DP7–DP0. During single-transfer reads, only the enable
bytes on D63–D0 and the enabled parity bits on DP7–DP0 (as
specified by BE7–BE0) are checked.
If PEN is asserted during the BRDY for a read cycle, and the
processor reports a data parity error on PCHK for that cycle,
the processor latches the physical address and cycle definition
of the failed bus cycle and (optionally) generates a machine
check exception. See the description of PEN on page 5-102 for
details.
If an error is reported on PCHK, the system must nevertheless
return all remaining BRDYs for that bus cycle—one BRDY for
single-transfer cycles and four BRDYs for burst cycles. Systems
that do not implement data parity generation and checking
should tie DP7–DP0 either High or Low and ignore the PCHK
output.
Summary of Contents for AMD-K5
Page 1: ...AMD K5 Processor Technical Reference Manual TM...
Page 10: ...x AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 24: ...1 4 Overview AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 54: ...2 30 Internal Architecture AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 116: ...4 26 Performance AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 356: ...6 44 System Design AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 380: ...7 24 Test and Debug AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 396: ...A 16 AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...
Page 406: ...I 10 Index AMD K5 Processor Technical Reference Manual 18524C 0 Nov1996...