Hardware Interfaces
R&S
®
SMBV100A
861
Operating Manual 1176.8016.02 ─ 17
Annex
A Hardware Interfaces
This section covers hardware related topics, like pin assignment of the GPIB bus inter-
face, monitor and AUX I/O connectors.
The remote control interfaces are described in detailes in the Operating Manual, sec-
tion "Remote Control Basics".
For specifications refer to the data sheet.
A.1 GPIB Bus Interface
Pin assignment
Figure A-1: Pin assignment of GPIB bus interface
Bus lines
●
Data bus with 8 lines D0 to D7:
The transmission is bit-parallel and byte-serial in the ASCII/ISO code. D0 is the
least significant bit, D7 the most significant bit.
●
Control bus with five lines:
IFC
(Interface Clear): active LOW resets the interfaces of the instruments connec-
ted to the default setting.
ATN
(Attention): active LOW signals the transmission of interface messages, inac-
tive HIGH signals the transmission of device messages.
GPIB Bus Interface
