9
SLAU367P – October 2012 – Revised April 2020
Copyright © 2012–2020, Texas Instruments Incorporated
Contents
21.3.1
Output Channels (CH0_OUT and CH1_OUT)
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21.3.2
Trim Registers for the Output Drivers and Termination Resistors
.......................................
21.3.3
Input Channels (CH0_IN and CH1_IN)
......................................................................
21.3.4
External Bias (XPB0 and XPB1 on SAPH_A)
..............................................................
21.4
Acquisition Sequencer (ASQ)
...........................................................................................
21.4.1
Time Counter
...................................................................................................
21.4.2
Six Time Mark Events
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21.4.3
Triggering the ASQ
.............................................................................................
21.4.4
Auto Mode and Register Mode
...............................................................................
21.5
Ultra-Low-Power Bias Mode
.............................................................................................
21.6
Interrupts Triggers
.......................................................................................................
21.7
DMA Triggers
.............................................................................................................
21.8
SAPH and SAPH_A Registers
..........................................................................................
21.8.1
SAPHIIDX/SAPH_AIIDX Register (Offset = 0h) [reset = 0h]
..............................................
21.8.2
SAPHMIS/SAPH_AMIS Register (Offset = 2h) [reset = 0h]
...............................................
21.8.3
SAPHRIS/SAPH_ARIS Register (Offset = 4h) [reset = 0h]
...............................................
21.8.4
SAPHIMSC/SAPH_AIMSC Register (Offset = 6h) [reset = 0h]
...........................................
21.8.5
SAPHICR/SAPH_AICR Register (Offset = 8h) [reset = 0h]
...............................................
21.8.6
SAPHISR/SAPH_AISR Register (Offset = Ah) [reset = 0h]
...............................................
21.8.7
SAPHDESCLO/SAPH_ADESCLO Register (Offset = Ch) [reset = 10h]
................................
21.8.8
SAPHDESCHI/SAPH_ADESCHI Register (Offset = Eh) [reset = 5553h]
...............................
21.8.9
SAPHKEY/SAPH_AKEY Register (Offset = 10h) [reset = 0h]
............................................
21.8.10
SAPHOCTL0/SAPH_AOCTL0 Register (Offset = 12h) [reset = 0h]
....................................
21.8.11
SAPHOCTL1/SAPH_AOCTL1 Register (Offset = 14h) [reset = 0h]
....................................
21.8.12
SAPHOSEL/SAPH_AOSEL Register (Offset = 16h) [reset = 5h]
.......................................
21.8.13
SAPHCH0PUT/SAPH_ACH0PUT Register (Offset = 20h) [reset = 0h]
................................
21.8.14
SAPHCH0PDT/SAPH_ACH0PDT Register (Offset = 22h) [reset = 0h]
................................
21.8.15
SAPHCH0TT/SAPH_ACH0TT Register (Offset = 24h) [reset = 0h]
....................................
21.8.16
SAPHCH1PUT /SAPH_ACH1PUT Register (Offset = 26h) [reset = 0h]
...............................
21.8.17
SAPHCH1PDT/SAPH_ACH1PDT Register (Offset = 28h) [reset = 0h]
................................
21.8.18
SAPHCH1TT/SAPH_ACH1TT Register (Offset = 2Ah) [reset = 0h]
...................................
21.8.19
SAPHMCNF/SAPH_AMCNF Register (Offset = 2Ch) [reset = 2h]
.....................................
21.8.20
SAPHTACTL/SAPH_ATACTL Register (Offset = 2Eh) [reset = 0h]
....................................
21.8.21
SAPHICTL0 /SAPH_AICTL0 Register (Offset = 30h) [reset = 90h]
....................................
21.8.22
SAPHBCTL/SAPH_ABCTL Register (Offset = 34h) [reset = A1h]
......................................
21.8.23
SAPHPGC/SAPH_APGC Register (Offset = 40h) [reset = 0h]
.........................................
21.8.24
SAPHPGLPER/SAPH_APGLPER Register (Offset = 42h) [reset = 0h]
...............................
21.8.25
SAPHPGHPER/SAPH_APGHPER Register (Offset = 44h) [reset = 0h]
..............................
21.8.26
SAPHPGCTL/SAPH_APGCTL Register (Offset = 46h) [reset = 11h]
..................................
21.8.27
SAPHPPGTRIG/SAPH_APPGTRIG Register (Offset = 48h) [reset = 0h]
.............................
21.8.28
SAPH_AXPGCTL Register (Offset = 4Ah) [reset = 0h]
..................................................
21.8.29
SAPH_AXPGLPER Register (Offset = 4Ch) [reset = 0h]
................................................
21.8.30
SAPH_AXPGHPER Register (Offset = 4Eh) [reset = 0h]
................................................
21.8.31
SAPHASCTL0/SAPH_AASCTL0 Register (Offset = 60h) [reset = 0h]
.................................
21.8.32
SAPHASCTL1/SAPH_AASCTL1 Register (Offset = 62h) [reset = 0h]
.................................
21.8.33
SAPHASQTRIG/SAPH_AASQTRIG Register (Offset = 64h) [reset = 0h]
.............................
21.8.34
SAPHAPOL/SAPH_AAPOL Register (Offset = 66h) [reset = 0h]
.......................................
21.8.35
SAPHAPLEV /SAPH_AAPLEV Register (Offset = 68h) [reset = 0h]
...................................
21.8.36
SAPHAPHIZ /SAPH_AAPHIZ Register (Offset = 6Ah) [reset = 0h]
....................................
21.8.37
SAPHATM_A/SAPH_AATM_A Register (Offset = 6Eh) [reset = 0h]
...................................
21.8.38
SAPHATM_B/SAPH_AATM_B Register (Offset = 70h) [reset = 0h]
...................................
21.8.39
SAPHATM_C/SAPH_AATM_C Register (Offset = 72h) [reset = 0h]
...................................
21.8.40
SAPHATM_D/SAPH_AATM_D Register (Offset = 74h) [reset = 0h]
...................................