Instruction Set Description
216
SLAU367P – October 2012 – Revised April 2020
Copyright © 2012–2020, Texas Instruments Incorporated
CPUX
4.6.3.4
ANDX
ANDX.A
Logical AND of source address-word with destination address-word
ANDX.[W]
Logical AND of source word with destination word
ANDX.B
Logical AND of source byte with destination byte
Syntax
ANDX.A src,dst
ANDX src,dst
or
ANDX.W src,dst
ANDX.B src,dst
Operation
src .and. dst
→
dst
Description
The source operand and the destination operand are logically ANDed. The result is
placed into the destination. The source operand is not affected. Both operands may be
located in the full address space.
Status Bits
N:
Set if result is negative (MSB = 1), reset if positive (MSB = 0)
Z:
Set if result is zero, reset otherwise
C:
Set if the result is not zero, reset otherwise. C = (.not. Z)
V:
Reset
Mode Bits
OSCOFF, CPUOFF, and GIE are not affected.
Example
The bits set in R5 (20-bit data) are used as a mask (AAA55h) for the address-word TOM
located in 2 words. If the result is zero, a branch is taken to label TONI.
MOVA
#AAA55h,R5
; Load 20-bit mask to R5
ANDX.A
R5,TOM
; TOM .and. R5 -> TOM
JZ
TONI
; Jump if result 0
...
; Result > 0
or shorter:
ANDX.A
#AAA55h,TOM
; TOM .and. AAA55h -> TOM
JZ
TONI
; Jump if result 0
Example
A table byte pointed to by R5 (20-bit address) is logically ANDed with R6. R6.19:8 = 0.
The table pointer is auto-incremented by 1.
ANDX.B
@R5+,R6
; AND table byte with R6. R5 + 1