ESI Registers
1007
SLAU367P – October 2012 – Revised April 2020
Copyright © 2012–2020, Texas Instruments Incorporated
Extended Scan Interface (ESI)
Table 37-24. ESITSM Register Description (continued)
Bit
Field
Type
Reset
Description
1-0
ESIDIV1x
RW
0h
TSM SMCLK divider. These bits select the SMCLK division for the TSM.
00b = /1
01b = /2
10b = /4
11b = /8
Table 37-25. TSM Start Trigger ACLK Divider
ACLK
Divider
ESIDIV3Bx
ESIDIV3Ax
ACLK
Divider
ESIDIV3Bx
ESIDIV3Ax
2
000
000
126
011
100
6
000
001
130
010
110
10
000
010
150
010
111
14
000
011
154
011
101
18
000
100
162
100
100
22
000
101
182
011
110
26
000
110
198
100
101
30
000
111
210
011
111
42
001
011
234
100
110
50
010
010
242
101
101
54
001
100
270
100
111
66
001
101
286
101
110
70
010
011
330
101
111
78
001
110
338
110
110
90
001
111
390
110
111
98
011
011
450
111
111
110
010
101