SAPH and SAPH_A Registers
539
SLAU367P – October 2012 – Revised April 2020
Copyright © 2012–2020, Texas Instruments Incorporated
Sequencer for Acquisition, Programmable Pulse Generator, and Physical
Interface (SAPH, SAPH_A)
Table 21-26. SAPHICTL0/SAPH_AICTL0 Register Field Descriptions (continued)
Bit
Field
Type
Reset
Description
3-0
MUXSEL
R/W
0h
Input Multiplexer Channel Select
Reset type: PUC
0h (R/W) = CH0IN : Channel 0 is selected for input
1h (R/W) = CH1IN : Channel 1 is selected for input
2h (R/W) = reserved for future channels
3h (R/W) = reserved for future channels
4h (R/W) = reserved for future channels
5h (R/W) = reserved for future channels
6h (R/W) = reserved for future channels
7h (R/W) = reserved for future channels
8h (R/W) = no channel is selected
9h (R/W) = no channel is selected
Ah (R/W) = no channel is selected
Bh (R/W) = no channel is selected
Ch (R/W) = no channel is selected
Dh (R/W) = no channel is selected
Eh (R/W) = no channel is selected
Fh (R/W) = no channel is selected