MSP430 and MSP430X Instructions
153
SLAU367P – October 2012 – Revised April 2020
Copyright © 2012–2020, Texas Instruments Incorporated
CPUX
4.5.2.6
MSP430X Address Instructions
MSP430X address instructions are instructions that support 20-bit operands but have restricted
addressing modes. The addressing modes are restricted to the register mode and the immediate mode,
except for the MOVA instruction as listed in
. Restricting the addressing modes removes the
need for the additional extension-word op-code improving code density and execution time. Address
instructions should be used any time an MSP430X instruction is needed with the corresponding restricted
addressing mode.
(1)
* = Status bit is affected
– = Status bit is not affected
0 = Status bit is cleared
1 = Status bit is set
Table 4-16. Address Instructions, Operate on 20-Bit Register Data
Mnemonic
Operands
Operation
Status Bits
(1)
V
N
Z
C
ADDA
Rsrc,Rdst
Add source to destination register
*
*
*
*
#imm20,Rdst
MOVA
Rsrc,Rdst
Move source to destination
–
–
–
–
#imm20,Rdst
z16(Rsrc),Rdst
EDE,Rdst
&abs20,Rdst
@Rsrc,Rdst
@Rsrc+,Rdst
Rsrc,z16(Rdst)
Rsrc,&abs20
CMPA
Rsrc,Rdst
Compare source to destination register
*
*
*
*
#imm20,Rdst
SUBA
Rsrc,Rdst
Subtract source from destination register
*
*
*
*
#imm20,Rdst