UUPS Registers
477
SLAU367P – October 2012 – Revised April 2020
Copyright © 2012–2020, Texas Instruments Incorporated
Universal USS Power Supply (UUPS)
Table 19-16. UUPSCTL Register Field Descriptions (continued)
Bit
Field
Type
Reset
Description
8
USSPWRUP
W
0h
Power up the USS module. This bit is self cleared. Writing '0' has no
effect.
Note: This bit is read as zero.
Reset type: PUC
0h (R/W) = No action
1h (R/W) = Power up the USS module and generate the
PSQ_START to the ASQ if CTL.ASQEN = 1.
Note: This bit becomes invalid in debug mode.
7
USSSWRST
R/W
0h
Software reset
Reset type: PUC
0h (R/W) = Disabled. USS (and sub modules) reset released for
operation
1h (R/W) = Enabled. USS (and sub modules) logic held in reset state
6-4
RESERVED
R
0h
Reserved
3
USS_BUSY
R
0h
USS Busy bit. Read Only. This bit is set to '1' if one of the following
conditions is met.
1) CTL.UPSTATE = 2
2) ASQ is in the middl of performing a measurement process
3) SDHS.CTL5.SDHS_LOCK = 1.
Reset type: PUC
0h (R) = The USS module is not busy.
1h (R) = The USS module is busy.
2-1
UPSTATE
R
0h
USS Power state bits. Read Only Note: Due to the synchronization
issue with 2 bits, there is a very short time window that an invalid
value can be read while power transition. In case an accurarte state
information is needed, a simple verification would be required - Read
the resister twice in a row and check if the two values are the same.
Reset type: PUC
0h (R) = USS is in OFF state
1h (R) = USS is in STANDBY state
2h (R) = USS power state is in transition.
3h (R) = USS is in READY state
0
LDORDY
R
0h
USS LDO is ready.
Reset type: PUC
0h (R) = USS LDO is powered down or in transition state
1h (R) = USS LDO is powered on