ESI Registers
1009
SLAU367P – October 2012 – Revised April 2020
Copyright © 2012–2020, Texas Instruments Incorporated
Extended Scan Interface (ESI)
37.3.17 ESIOSC Register
Extended Scan Interface Oscillator Control Register
Figure 37-38. ESIOSC Register
15
14
13
12
11
10
9
8
Reserved
ESICLKFQx
r0
r0
rw-1
rw-0
rw-0
rw-0
rw-0
rw-0
7
6
5
4
3
2
1
0
Reserved
ESICLKGON
ESIHFSEL
r0
r0
r0
r0
r0
r0
rw-0
rw-0
Table 37-27. ESIOSC Register Description
Bit
Field
Type
Reset
Description
15-14
Reserved
R
0h
Reserved. These bits are always read as zero and, when written, do not affect
the bit setting.
13-8
ESICLKFQx
RW
20h
Internal oscillator frequency adjust. These bits are used to adjust the internal
oscillator frequency. Each increase or decrease of the ESICLKFQx bits
increases or decreases the internal oscillator frequency by approximately 3%.
000000b = Minimum frequency
⋮
100000b = Nominal frequency
⋮
111111b = Maximum frequency
7-2
Reserved
R
0h
Reserved. These bits are always read as zero and, when written, do not affect
the bit setting.
1
ESICLKGON
RW
0h
Internal oscillator control. When ESICLKGON = 1 and ESIHFSEL = 1, the
internal oscillator calibration is started. ESICLKGON is not used when
ESIHFSEL = 0.
0b = No internal oscillator calibration is started.
1b = The internal oscillator calibration is started when ESIHFSEL = 1.
0
ESIHFSEL
RW
0h
Internal oscillator enable. This bit selects the high frequency clock source for the
TSM.
0b = TSM high frequency clock source is SMCLK.
1b = TSM high frequency clock source is the Extended Scan IF internal
oscillator.