RM0082
LS_Analog to digital convertor (ADC)
Doc ID 018672 Rev 1
643/844
29
LS_Analog to digital convertor (ADC)
29.1 Overview
Within its Low Speed Subsystem, the device includes an Analog-to-Digital Converter (ADC),
which is connected to the APB bus.
Main features of the ADC are listed below:
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Successive approximation conversion method.
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10 bit resolution.
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1 MSPS.
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8 analog input (AIN) channels, ranging from 0 to 2.5V.
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For each input, the number of samples to be collected for average calculation can be 1
(no average) or up to 128 as 2's power (2, 4, 8...).
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INL ± 1 LSB, DNL ± 1 LSB.
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Programmable conversion speed, from a minimum conversion time of 1 µs.
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Normal or enhanced mode. In normal mode the conversion start upon CPU request
while in enhanced mode the ADC converts continuously the selected channels
inserting a selectable amount of time between two conversions.
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DC internal reference voltage is 1.95(Min), 2.0(Typ), 2.05(Max)
Positive and negative reference voltages can be supplied by dedicated pins to select
different range (Default 0 - 2.5V).
29.2 Functional
description
shows the functional block diagram of the ADC.
Figure 66.
ADC block diagram
APB Bus
8 Analog Inputs
Configuration Regisers
10 bit conversion data
ADC