Eaton easySafety, Manual, Page: 121 / 695

Circuit diagram elements
117
02/16 MN05013001Z EN
Marker ran
ge th
at can
not be dec
lared as retent
ive
Word (MW) 54 53 52 51 50 49
D-Word (MD) 27 26 25
Word (MW) 60 59 58 57 56 55
D-Word (MD) 30 29 28
Word (MW) 66 65 64 63 62 61
D-Word (MD) 33 32 31
Word (MW) 72 71 70 69 68 67
D-Word (MD) 36 35 34
Word (MW) 78 77 76 75 74 73
D-Word (MD) 39 38 37
Word (MW) 84 83 82 81 80 79
D-Word (MD) 42 41 40
Word (MW) 90 89 88 87 86 85
D-Word (MD) 45 44 43
Word (MW) 96 95 94 93 92 91
D-Word (MD) 48 47 46
D-Word (MD) 51 50 49
D-Word (MD) … … …
D-Word (MD) 96 … …
h Avoid any accidental double assignment of standard
markers since it is possible to access physically identical
memory ranges with different marker operands. table 9
illustrates the marker allocation. For example, it is also
possible to accidentally access the 96 standard marker bits
via the first 12 marker bytes (MB), 6 marker words or 3
marker double words at the same time and therefore
produce undefined states. With successive accesses within
an MD, such as to MD1, MW2, MB4 or standard M32, the
last write operation is retained.
Tip: By using marker bytes starting from MB13, marker
words starting from MW07 and marker double words
starting from MD04, double assignments with standard
marker bits M01-M96 are prevented.