Keysight E6650A EXF, Руководство по программированию для пользователя

Страница: 63 / 657

2 Programming the Test Set
STATus Subsystem
Bit Description
0, 1 These bits are always set to 0.
2 A 1 in this bit position indicates that the SCPI error queue is not empty which means that it
contains at least one error message.
3 A 1 in this bit position indicates that the data questionable summary bit has been set. The
data questionable event register can then be read to determine the specific condition that
caused this bit to be set.
4 A 1 in this bit position indicates that the instrument has data ready in the output queue. There
are no lower status groups that provide input to this bit.
5 A 1 in this bit position indicates that the standard event summary bit has been set. The
standard event status register can then be read to determine the specific event that caused
this bit to be set.
6 A 1 in this bit position indicates that the instrument has at least one reason to report a status
change. This bit is also called the master summary status bit (MSS).
7 A 1 in this bit position indicates that the standard operation summary bit has been set. The
standard operation event register can then be read to determine the specific condition that
caused this bit to be set.
To query the status byte register, send the command *STB? The response will be the decimal sum of the
bits which are set to 1. For example, if bit number 7 and bit number 3 are set to 1, the decimal sum of the 2
bits is 128 plus 8. So the decimal value 136 is returned. The *STB command does not clear the status
register.
In addition to the status byte register, the status byte group also contains the service request enable
register. This register lets you choose which bits in the status byte register will trigger a service request.
Send the *SRE <integer> command where <integer> is the sum of the decimal values of the bits you want
to enable plus the decimal value of bit 6. For example, assume that you want to enable bit 7 so that
whenever the standard operation status register summary bit is set to 1 it will trigger a service request.
Send the command *SRE 192 (because 192 = 128 + 64). You must always add 64 (the numeric value of RQS
Sequence Analyzer User's & Programmer's Reference 63