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M451
May. 4, 2018
Page
880
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1006
Rev.2.08
M4
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Example for Bit Timing at Low Baud Rate
In this example, the frequency of APB_CLK is 2 MHz, BRP (CAN_BTIME[5:0]) is 1, and the bit rate is
100 Kbit/s.
t
q
1
us = 2 •t
APB_CLK
delay of bus driver
200 ns
delay of receiver circuit 80
ns
delay of bus line (40m) 220
ns
t
Prop
1
us = 1 • t
q
t
SJW
4
us = 4 • t
q
t
TSeg1
5
us = t
Prop
+ t
SJW
t
TSeg2
4
us
= Information Processing Time + 3 • t
q
t
Sync-Seg
1
us
= 1 • t
q
bit time 10
us
= t
Sync-Seg
+ t
TSeg1
+ t
TSeg2
tolerance for APB_CLK 1.58
%
))
2
(
13
2
)
2
,
1
(
PB
time
bit
PB
PB
Min
4us
= ------------------------------------------------------------------
2 x ( 13 x ( 10us
– 4us ) )
In this example, the concatenated bit time parameters are (4-1)
3
& (5-1)
4
& (4-1)
2
& (2-1)
6
, and the Bit
Timing Register is programmed to 0x34C1.