M451
May. 4, 2018
Page
433
of
1006
Rev.2.08
M4
51
S
E
RI
E
S
T
E
CH
NICA
L RE
F
E
R
E
NC
E
M
A
NU
A
L
1 = External Reset Mode Enabled.
Note1:
When CAPFUNCS is 0, transition on Tx_EXT (x= 0~3) pin is using to save the 24-
bit timer counter value.
Note2:
When CAPFUNCS is 1, transition on Tx_EXT (x= 0~3) pin is using to reset the 24-
bit timer counter value.
[3]
CAPEN
Timer External Capture Pin Enable Bit
This bit enables the Tx_EXT pin.
0 =Tx_EXT (x= 0~3) pin Disabled.
1 =Tx_EXT (x= 0~3) pin Enabled.
[2:1]
CAPEDGE
Timer External Capture Pin Edge Detect
00 = A Falling edge on Tx_EXT (x= 0~3) pin will be detected.
01 = A Rising edge on Tx_EXT (x= 0~3) pin will be detected.
10 = Either Rising or Falling edge on Tx_EXT (x= 0~3) pin will be detected.
11 = Reserved.
[0]
CNTPHASE
Timer External Count Phase
This bit indicates the detection phase of external counting pin Tx (x= 0~3).
0 = A Falling edge of external counting pin will be counted.
1 = A Rising edge of external counting pin will be counted.
