Nuvoton ARM Cortex NuMicro M451 Series, Technical Reference Manual

Page: 289 / 1006

M451
May. 4, 2018 Page 289 of 1006 Rev.2.08
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Clock Divider Number Register 0 (CLK_CLKDIV0)
Register Offset R/W Description Reset Value
CLK_CLKDIV0 0x20 R/W Clock Divider Number Register 0 0x0000_0000
31 30 29 28 27 26 25 24
Reserved
23 22 21 20 19 18 17 16
EADCDIV
15 14 13 12 11 10 9 8
Reserved UARTDIV
7 6 5 4 3 2 1 0
USBDIV HCLKDIV
Bits Description
[31:24] Reserved Reserved.
[23:16] EADCDIV
EADC Clock Divide Number From EADC Clock Source
EADC clock frequency = (EADC clock source frequency) / (E 1).
[15:12] Reserved Reserved.
[11:8] UARTDIV
UART Clock Divide Number From UART Clock Source
UART clock frequency = (UART clock source frequency) / (U 1).
[7:4]
USBDIV
USB Clock Divide Number From PLL Clock
USB clock frequency = (PLL frequency) / ( 1).
[3:0] HCLKDIV
HCLK Clock Divide Number From HCLK Clock Source
HCLK clock frequency = (HCLK clock source frequency) / (H 1).