M451
May. 4, 2018
Page
442
of
1006
Rev.2.08
M4
51
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CH
NICA
L RE
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R
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NC
E
M
A
NU
A
L
0
1
2
3
4
5
0
1
2
3
4
5
6
7
8
0
1
2
3
4
5
6
7
8
6
7
8
PWM Counter
(CNT)
PWM Period
PWM Period
PWM Period
PERIOD = 5
PERIOD = 8
PERIOD = 8
zero point event
period point event
Figure 6.9-8 PWM Down Counter Type
Up-Down Counter Type
6.9.5.5
In the up-down counter operation, the 16 bits PWM counter is an up-down counter and starts
counting-up from zero to PERIOD and then starts counting down to zero to complete a PWM
period. The current counter value can be found by reading the CNT. PWM generates zero point
event when the counter counts to 0 and generates center point event when counting to PERIOD.
The Figure 6.9-9 shows an example of up-down counter, wherein PWM period time =
(2xPERIOD) x PWM clock time. The DIRF (PWM_CNTn[16]) is counter direction indicator flag,
where high is up counting, and low is down counting.
PWM Direction
(DIRF)
PWM Counter
(CNT)
0
1
2
3
4
3
1
2
0
1
2
3
4
3
1
2
0
5
6
7
6
4
5
1
2
3
4
PWM Period
PERIOD = 4
PERIOD = 7
PWM Period
zero point event
center point event
Figure 6.9-9 PWM Up-Down Counter Type
PWM Comparator
6.9.5.6
There are two kinds of comparator registers
－
one is CMPDAT (PWM_CMPDATn[15:0]) and the
other is FTCMPDAT (PWM_FTCMPDATn[15:0]). CMPDAT is a basic comparator register of
PWM channel n; each channel only has one CMPDAT. In Independent mode, the
CMPDAT’s
value is continuously compared to the
corresponding channel’s counter value. In Complementary
mode, odd chann
el’s counter is useless and the corresponding comparator is continuously
compared to the complementary even channel. For example, channel 0 and channel 1 are
complementary channels, in C
omplementary mode, channel 1’s comparator is continuously
compared to
channel 0’s counter, but not channel 1’s. When the counter is equal to compared
register, PWM generates an event and uses the event to generate PWM pulse, interrupt or use to
trigger EADC/DAC. In up-down counter type, two events will be generated in a PWM period as
shown in Figure 6.9-10.
